• 专利标题:   Mid-infrared light emitting diode for use in silicon photonic circuit, comprises graphene lower electrode layer, black phosphorous layer, and graphene upper electrode layer sequentially arranged along thickness direction of diode.
  • 专利号:   US2022140187-A1, TW202220233-A
  • 发明人:   LIU C
  • 专利权人:   UNIV NAT TSING HUA, UNIV NAT TSING HUA
  • 国际专利分类:   G02B006/10, G02B006/13, H01L033/00, H01L033/26, H01L033/40, H01L033/58, G02B006/122, H01L033/36
  • 专利详细信息:   US2022140187-A1 05 May 2022 H01L-033/26 202245 English
  • 申请详细信息:   US2022140187-A1 US129932 22 Dec 2020
  • 优先权号:   TW138125

▎ 摘  要

NOVELTY - Mid-infrared light emitting diode (10) comprises graphene lower electrode layer (100), black phosphorous layer (110), and graphene upper electrode layer (120) sequentially arranged along a thickness direction of the mid-infrared light emitting diode, where black phosphorous layer contacts graphene lower electrode layer and graphene upper electrode layer. USE - Mid-infrared light emitting diode for use in a silicon photonic circuit. ADVANTAGE - The production cost of the mid-infrared light emitting diode is reduced and the manufacturing cost is reduced. The light extraction efficiency of the light emitting device is improved. The manufacturing process of the silicon photonic circuit is simplified and the production cost is decreased. The thickness of the graphene lower electrode layer and the graphene upper electrode layer is controlled by controlling the thicknesses of the black phosphorous layer to control the thickness and materials of different epitaxial layers or buffer layers in a molecular beam epitaxy process, so that the manufacturing process is simplified. DETAILED DESCRIPTION - INDEPENDENT CLAIMS are included for: (1) a method for manufacturing mid-infrared light emitting diode, which involves: (a) forming graphene lower electrode layer, black phosphorous layer, and graphene upper electrode layer by mechanical exfoliation; and (b) stacking graphene lower electrode layer, black phosphorous layer, and graphene upper electrode layer vertically in sequence by dry transfer, where black phosphorous layer contacts graphene lower electrode layer and graphene upper electrode layer; (2) a silicon photonic circuit, which comprises silicon waveguide device that comprises substrate, silicon waveguide arranged on the substrate, multiple electrodes arranged on the substrate and separated from silicon waveguide, and mid-infrared light emitting diode arranged on the silicon waveguide device; and (3) a method for manufacturing silicon photonic circuit, which involves: (a) forming a silicon waveguide and multiple electrodes on a substrate to form a silicon waveguide device; (b) forming a graphene lower electrode layer, black phosphorous layer, and graphene upper electrode layer by mechanical exfoliation; (c) stacking graphene lower electrode layer, black phosphorous layer, and graphene upper electrode layer vertically in sequence by dry transfer to form a mid-infrared light emitting diode, where black phosphorous layer contacts graphene lower electrode layer and graphene upper electrode layer; and (d) forming the mid-infrared light emitting diode on the silicon waveguide device by dry transfer, where graphene lower electrode layer and graphene upper electrode layer are respectively electrically connected to multiple electrodes. DESCRIPTION OF DRAWING(S) - The drawing shows a schematic view of a mid-infrared light emitting diode. Mid-infrared light emitting diode (10) Silicon chip (20) Graphene lower electrode layer (100) Black phosphorous layer (110) Graphene upper electrode layer (120) Hexagonal boron nitride covering layer (130) Substrate (200)