▎ 摘　　要

NOVELTY - The apparatus has an error correcting code (ECC) decoder for decoding data stored by a non-volatile memory device using a parity check matrix with columns (506) of different column weights (502). The decoder processes a set of the columns of the matrix at a speed in response to the column weights for the set of columns failing to satisfy a threshold, and artificially slows processing of another set of column of the parity matrix to a slower speed than the former speed, when column weights satisfy the threshold. An ECC encoder encodes the stored data by enforcing a maximum number of edges in a window of clock cycles such that the ECC decoder artificially slows the processing of the second set of columns of the parity check matrix in response to the column weights satisfying the threshold. USE - Apparatus for decoding irregular low-density parity-check (LDPC) codes in non-volatile memory device. Uses include but are not limited to resistive RAM (ReRAM), memristor memory, programmable metallization cell memory, phase-change memory (PCM), ovonic unified memory, chalcogenide RAM (C-RAM), NOT-AND (NAND) flash memory e.g. two-dimensional (2D) NAND flash memory, and three-dimensional (3D) NAND flash memory, NOT-OR (NOR) flash memory, nano RAM, nanocrystal wire-based memory, silicon-oxide based sub-10 nanometer process memory, graphene memory, Silicon-Oxide-Nitride-Oxide-Silicon (SONOS) memory, programmable metallization cell (PMC), conductive-bridging RAM (CBRAM), magneto-resistive RAM (MRAM), magnetic storage media e.g., hard disk tape, and optical storage media, ADVANTAGE - The ECC decoder is configured to artificially slow processing of one or more of the columns of the parity check matrix in response to column weights for the columns satisfying a threshold which ensures that the power consumption of the decoder for irregular error correcting codes is reduced effectively. The error correction capabilities are increased and the decoding latency is decreased effectively. DETAILED DESCRIPTION - An INDEPENDENT CLAIM is included for a method for decoder for irregular error correcting codes. DESCRIPTION OF DRAWING(S) - The drawings show a graphical representation of power consumption for processing columns of a parity check matrix over time and graphical representation of power consumption for processing columns of a parity check matrix by column weight over time. Column weight (502) Clock cycle (504) Column (506) Power consumption (510) Power threshold (512)