▎ 摘　　要

NOVELTY - The transistor comprises a formation substrate, a graphene layer abutting the formation substrate, a source region (302) abutting the graphene layer, a drain region (304) abutting the graphene layer, a gate dielectric (306) abutting the graphene between the source region and the drain region, a gate abutting the gate dielectric, and a structural substrate abutting the formation substrate. The formation substrate has a lattice structure analogous to (0001) basal plane of graphite. USE - Used as a microelectronic transistor such as a complementary metal oxide semiconductor field effect transistor. ADVANTAGE - The microelectronic transistor can be economically and simply fabricated with high mobility and improved performance and quality. DETAILED DESCRIPTION - An INDEPENDENT CLAIM is included for a method of fabricating or forming a transistor. DESCRIPTION OF DRAWING(S) - The diagram shows a schematic view of a transistor formed on a graphene layer. Field effect transistor (300) Source region (302) Drain region (304) Gate dielectric (306) Side wall spacers. (312)