• 专利标题:   Graphene wiring structure for use in semiconductor device, has multilayer graphene formed on insulating film, where average particle diameter of graphene crystals is larger than width of multilayer graphene.
  • 专利号:   US2018277487-A1, JP2018160540-A, US10325851-B2
  • 发明人:   MIYAZAKI H, SAKAI T, NISHIDA Y, YOSHIDA T, YAMAZAKI Y, KATAGIRI M, SAKUMA N, SAKUMA H
  • 专利权人:   TOSHIBA KK, TOSHIBA KK
  • 国际专利分类:   H01L021/3205, H01L021/3213, H01L021/768, H01L023/522, H01L023/532, B82Y030/00, B82Y040/00, C01B032/186, C01B032/194, G03F007/20, H01L021/336, H01L027/11556, H01L027/11582, H01L029/788, H01L029/792, H01L027/1157, H01L027/11524
  • 专利详细信息:   US2018277487-A1 27 Sep 2018 H01L-023/532 201866 Pages: 28 English
  • 申请详细信息:   US2018277487-A1 US691257 30 Aug 2017
  • 优先权号:   JP056529

▎ 摘  要

NOVELTY - The structure has a multilayer graphene formed on an insulating film, where the multilayer graphene includes a set of graphene crystals with a zigzag direction oriented at 17 degrees or less with respect to an electric conduction direction. The multilayer graphene is a laminate of a set of strip-shaped graphene sheets. A cyclic structure of a five-membered ring or a seven-membered ring in the graphene crystals, where average particle diameter of the graphene crystals is larger than the width of the multilayer graphene. USE - Graphene wiring structure for use in a semiconductor device (claimed). ADVANTAGE - The multilayer graphene is relatively low resistance wiring within a range in which control of the crystal orientation is easy. The structure has a more specific configuration in which the low resistance multilayer graphene can be connected to an external element. DETAILED DESCRIPTION - An INDEPENDENT CLAIM is also included for a method for manufacturing a graphene wiring structure. DESCRIPTION OF DRAWING(S) - The drawing shows a schematic view of a graphene wiring structure. Memory film (MM) Substrate (S) Source line (SL) Silicon pillar (SP) Semiconductor device (40)