▎ 摘　　要

NOVELTY - The device has a substrate (110), and a channel stack that is provided over the substrate and comprising a two-dimensional (2D) channel layer (120), and a barrier layer. An energy band gap of the barrier layer is greater than an energy band gap of the 2D channel layer. A source or drain contacts are provided in contact with the channel stack. A gate electrode is provided below the substrate. The barrier layer and the source or drain contacts are provided above the 2D channel layer. The source/drain contacts are provided in contact with the 2D channel layer. The source/drain contacts are spaced apart from the 2D channel layer. The source/drain contacts are provided above the 2D channel layer and the barrier layer is below the 2D channel layer. The source/drain contacts are in contact with the 2D channel layer. USE - Semiconductor device e.g. integrated circuit used in CMOS logic device, high-speed switch e.g. radio frequency application, and power amplifier e.g. telecommunications and radar applications. ADVANTAGE - The semiconductor device with a good electrical performance can be formed because of the 2D channel. The source/drain electrodes are provided in contact with the 2D material layer to improve the electrical performance of the resulting semiconductor device. The 2D channel layer has atomic-scale thickness, and has high potential for scaling down, and the device performance of the semiconductor device can be further enhanced. The additional channel increases the carrier mobility of the semiconductor device. DETAILED DESCRIPTION - An INDEPENDENT CLAIM is included for a method for manufacturing semiconductor device. DESCRIPTION OF DRAWING(S) - The drawing shows a schematic diagram of method for manufacturing a semiconductor device. Thickness (T1) Substrate (110) channel layer (120)