• 专利标题:   Method for fabricating transistor using stacked structure, involves intercalating material between graphene layer and metal layer by heating material at pressure and temperature different from another temperature to form insulating layer.
  • 专利号:   US2016247942-A1, EP3062335-A1, KR2016103420-A, CN105914129-A, US9825182-B2
  • 发明人:   JEON I, KU J, KIM H, JEON I S, KU J Y, KIM H W, JIN X, QIU Z
  • 专利权人:   SAMSUNG ELECTRONICS CO LTD
  • 国际专利分类:   H01L021/04, H01L029/16, H01L029/66, H01L029/786, H01L021/20, H01L021/28, H01L021/285, H01L021/31, H01L021/02, H01L021/00
  • 专利详细信息:   US2016247942-A1 25 Aug 2016 H01L-029/786 201658 Pages: 17 English
  • 申请详细信息:   US2016247942-A1 US051270 23 Feb 2016
  • 优先权号:   KR025908

▎ 摘  要

NOVELTY - The method involves intercalating first material between a graphene layer (101) and a metal layer by heating the first material at first pressure and first temperature. Second material is deposited over a surface of the graphene layer. The second material is intercalated between the graphene layer and the metal layer by heating the second material at second pressure and second temperature different from the first temperature to form an insulating layer (103) between the metal layer and the graphene layer, where the first and second materials are chemically bonded to each other. USE - Method for fabricating a transistor using a stacked structure (claimed). ADVANTAGE - The method enables preventing damage to the graphene layer or penetration of impurities when the graphene layer is separated from a metal substrate and transferred to a material surface. The method enables simplifying fabrication process and increasing fabrication yield of a semiconductor device or a display apparatus by using the graphene layer. The method enables improving performance of the semiconductor device or the display apparatus as electrical properties of the graphene layer are maintained. DETAILED DESCRIPTION - An INDEPENDENT CLAIM is also included for a stacked structure. DESCRIPTION OF DRAWING(S) - The drawing shows a cross-sectional view of a structure of a transistor that is fabricated by using a stacked structure. Metal substrate (100) Graphene layer (101) Insulating layer (103) Stacked structure (150) Transistor (200)