• 专利标题:   Semiconductor device e.g. resistive RAM, for use in electronic device, has variable resistance layer arranged between first and second conductive lines, and electrode layer including graphene and arranged between resistance layer and selector layer.
  • 专利号:   US2023180626-A1, KR2023085735-A, JP2023084673-A, CN116249358-A
  • 发明人:   SHIN G H, SHIN G
  • 专利权人:   SK HYNIX INC, SK HYNIX INC
  • 国际专利分类:   H01L027/22, H01L043/02, H01L043/12, G06F015/78, G06F003/06, H10B061/00, H10B063/00, H10N050/01, H10N050/10, H10N050/80, H10N052/00, H10N070/00, H10N070/20
  • 专利详细信息:   US2023180626-A1 08 Jun 2023 H01L-043/02 202349 English
  • 申请详细信息:   US2023180626-A1 US940857 08 Sep 2022
  • 优先权号:   KR174187

▎ 摘  要

NOVELTY - Semiconductor device comprises first conductive lines (110). The second conductive lines (130) disposed on the first conductive lines to be spaced apart from the first conductive lines. A selector layer disposed between the first conductive lines and the second conductive lines. A variable resistance layer disposed between the first conductive lines and the second conductive lines. A first electrode layer including graphene and disposed between the variable resistance layer and the selector layer. The memory cells (120) disposed at intersections of the first conductive lines and the second conductive lines between the first conductive lines. USE - Semiconductor device. ADVANTAGE - The semiconductor device is provided with memory circuits or devices that can improve the performance and reduce the manufacturing defects of semiconductor device. The high-performance, high capacity semiconductor devices include memory devices that can store data by switching between different resistance states according to an applied voltage or current are provided. DETAILED DESCRIPTION - An INDEPENDENT CLAIM is included for a method for fabricating a semiconductor device, which involves: (a) forming a first conductive line; forming a selector layer over the first conductive line; (b) forming a first electrode layer that includes graphene over the selector layer; (c) forming a variable resistance layer; and (d) forming a second conductive line over the variable resistance layer. DESCRIPTION OF DRAWING(S) - The drawing shows a schematic view of a semiconductor device. 110First conductive lines 120Second conductive lines 130Memory cells