▎ 摘　　要

NOVELTY - The barristor has a gate electrode layer (200) formed on a center of a substrate (100). A gate insulation layer (300) is formed to block the gate electrode layer. A graphene channel layer (400) is formed on the gate insulation layer and bonded in parallel to have P-type and N-type or two different Fermi levels. A source electrode layer (500) is arranged to two sides of the graphene channel layer. A drain electrode layer is electrically arranged to two sides of the source electrode layer. The channel layer is arranged between the source electrode layer and the drain electrode layer. USE - Graphene-based ternary barrister. ADVANTAGE - The barristor reduces probability that generated valence band holes move to a graphene channel, thus causing a decrease in current. The barristor selects and utilizes an appropriate material and thickness of the gate insulation layer to secure an appropriate operating voltage and reliability depending on application. DESCRIPTION OF DRAWING(S) - The drawing shows a schematic view illustrating a manufacturing process for a graphene-based ternary barristor. Substrate (100) Gate electrode layer (200) Gate insulation layer (300) Graphene channel layer (400) Source electrode layer (500)