▎ 摘　　要

NOVELTY - The transistor has a gate (G1) that is provided on a substrate. A channel layer (C1) is provided with a three-dimensional (3D) channel region (3) to cover a portion of the gate. A source electrode (S1) is provided to contact a primary region of the channel layer. A drain electrode (D1) is provided to contact a secondary region of the channel layer. The channel layer is provided to cover both side surfaces and a top surface of the gate. The channel layer is provided with the graphene. USE - Transistor such as three-dimensional graphene channel transistor used in semiconductor device. ADVANTAGE - The transistor including the channel layer is provided with the 3D structure is scaled down, so that the sufficient effective channel length can be ensured. The method of manufacturing transistor is applied to the large-size substrate, so that the productivity of transistors can be improved and the manufacturing costs can be reduced. The drain portion is reduced, so that the resistance between the source portion and the drain portion can be reduced. Thus, the operating characteristics of the transistor can be improved, and the misalignment problems of the transistor can be prevented. DETAILED DESCRIPTION - An INDEPENDENT CLAIM is included for a method for manufacturing transistor. DESCRIPTION OF DRAWING(S) - The drawing shows a cross-sectional view of the transistor. Three dimensional channel region (3) Channel layer (C1) Drain electrode (D1) Gate (G1) Source electrode (S1)