▎ 摘　　要

NOVELTY - The graphene transistor (100) has a graphene layer (140) formed is on insulating thin film (120). A first electrode (151) is connected to an end of graphene layer. A second electrode (152) separated from other end of graphene layer contacts semiconductor substrate (110). A gate insulating layer (160) covers portion of graphene layer. A gate electrode (170) is on gate insulating layer. An energy barrier is between semiconductor substrate and graphene layer. The insulating thin film has Aluminum oxide (Al2O3), Hafnium oxide (HfO2), titanium oxide (TiO2), and silicon nitride (Si3N4). USE - Graphene transistor having tunable barrier in which insulating film is interposed between graphene layer and semiconductor. ADVANTAGE - The insulating layer minimizes an effect of a drain voltage on the semiconductor substrate. The energy barrier Eb1 is relatively large due to a Fermi level pinning phenomenon due to graphene, and accordingly, a driving current of the graphene switching device is reduced. A driving current is increased due to the insulating thin film, and accordingly, the driving voltage of the graphene transistor is reduced. A graphene transistor having a tunable barrier prevents or reduces a pinning phenomenon of graphene by placing an insulating thin film between a graphene and a semiconductor, and thus, a height of an energy barrier between the graphene and the semiconductor is reduced. DESCRIPTION OF DRAWING(S) - The drawing shows a cross-sectional view of the graphene transistor having a tunable barrier. Graphene transistor (100) Semiconductor substrate (110) Insulating thin film (120) Graphene layer (140) First electrode (151) Second electrode (152) Gate insulating layer (160) Gate electrode (170)