▎ 摘　　要

NOVELTY - The memory cell (10) has graphene layer (16) having controllable resistance states representing data values of the cell and ferroelectric layer (18) controlling the resistance states. The graphene layer is in high and low resistance states, when the ferroelectric layer has zero and non-zero remnant polarization respectively. The graphene layer is arranged between ferroelectric layer and dielectric layer (14) on silicon carbide substrate (12). The graphene layer is grown on copper, nickel, cobalt or any other surface. USE - Graphene-based memory cell for non-volatile memory. Uses include but are not limited to digital camera, MPEG audio layer-3 (MP3) player, flash drive and card, mobile phone, personal digital assistant (PDA) and ultra-portable notebook personal computer (PC). ADVANTAGE - By utilizing the field-dependent electrical resistance of graphene layer, the memory cell is fast enough to match the current DRAM. Both the writing and reading process in the cell are realized by low working bias, which reduces power consumption of devices using the cell. The organic ferroelectric layer allows for simple integration with flexible transparent electronic and acts simultaneously also as a capping and passivation layer. The data readings from the cell are not destructive and thus no following rewriting is required, so that the switching cycles are increased and power usage is reduced. Reliable data storage is provided due to stable, chemically inert properties of graphene. Graphene having ultra high charge carrier mobility gives the extremely fast recovery speed for the memory cell. DETAILED DESCRIPTION - An INDEPENDENT CLAIM is included for method of fabricating the memory cell. DESCRIPTION OF DRAWING(S) - The drawing shows a cross-sectional view of the memory cell. Memory cell (10) Substrate (12) Dielectric layer (14) Graphene layer (16) Ferroelectric layer (18)