▎ 摘　　要

NOVELTY - The semiconductor device has substrate. The multiple interconnects (10) are provided on the substrate. The first, third, and fifth catalyst regions have upper surfaces that are higher than second and fourth catalyst regions. The distance between the first catalyst region and the third catalyst region and distance between the third catalyst region and fifth catalyst region is greater than a mean free path of graphene. The graphene layer (400) has first graphene layer that is provided on the second catalyst region. The second graphene layer is provided on the fourth catalyst region. USE - Semiconductor device such as metal oxide semiconductor (MOS) transistor and capacitor. ADVANTAGE - The device has graphene interconnect that is easily lengthened. The interconnect resistance is reduced by increasing the number of the free electrons. The quantity of the catalyst material which is required to form the convex shape catalyst regions is reduced. DETAILED DESCRIPTION - An INDEPENDENT CLAIM is included for a method of manufacturing a semiconductor device. DESCRIPTION OF DRAWING(S) - The drawing shows the sectional view of the semiconductor device. Interconnect (10) Interlayer insulation film (200) Contact plug (201) Convex shape catalyst region (301) Graphene layer (400)