▎ 摘　　要

NOVELTY - The semiconductor device has wafers having graphene channel and complementary metal oxide semiconductor (CMOS) device layer that is formed on separate substrate (102) and surrounded with corresponding oxide layers (502). The source and drain are contacted to the graphene channel extended through the first oxide layer. The wafers are bonded together by oxide-to-oxide bond between the oxide layers. The CMOS device layer is in contact with the source and drain, and gate are connected to the graphene channel respectively. USE - Semiconductor device. ADVANTAGE - The total length of the wiring length can be reduced so as to reduced the interconnect delay times while dramatically increasing the number of interconnects between chips so that the three dimensional integration can be efficiently performed for graphene-based circuits. The complexity in the graphene circuits can be facilitated without the potential contamination from carbon materials so as to ensure the graphene channels incorporated at the desirable positions of the circuit. DETAILED DESCRIPTION - An INDEPENDENT CLAIM is included for method of fabricating semiconductor device. DESCRIPTION OF DRAWING(S) - The drawing shows the cross-sectional view of the metal layer. Substrate (104) Oxide layer (502) CMOS wafer (1002) Box (1004) Metal layer (1502)