▎ 摘　　要

NOVELTY - The method involves providing a substrate structure, which comprises a substrate, a first dielectric layer (201) provided on the substrate, and a metal interconnect line extending through the dielectric layer. A portion of the dielectric layer is removed to form a recess exposing a surface of the metal interconnect line. A graphene layer is formed on the exposed surface of the metal interconnect line. A second dielectric layer (202) filling the recess and covering the graphene layer is formed, where the substrate structure comprises a first barrier layer (301) provided between the substrate and the first dielectric layer, and a second barrier layer (302) formed at a bottom and on a side surface of the metal interconnect line. USE - Method for manufacturing a metal interconnect structure of a semiconductor device. ADVANTAGE - The method enables preventing metal in metal interconnection from diffusing into the first dielectric layer. The method enables preventing the metal interconnect line from being oxidized by air resulting in a relatively short queue time (Q-time) of a chemical mechanical planarization (CMP) process during semiconductor manufacturing processes. DESCRIPTION OF DRAWING(S) - The drawing shows a cross-sectional view illustrating an intermediate stage of a substrate structure. First dielectric layer (201) Second dielectric layer (202) First barrier layer (301) Second barrier layer (302) Through-hole (402)