• 专利标题:   Integrated vertical device obtained by directly interconnecting capacitor coupling in semiconductor field, has a silicon carbide substrate for using natural bonding generated by graphene-silicon carbide epitaxy system during epitaxial growth process.
  • 专利号:   CN115985888-A
  • 发明人:   JI P, ZHANG K, ZHANG Z, LI R, MA L
  • 专利权人:   UNIV TIANJIN
  • 国际专利分类:   H01L021/768, H01L023/522, H01L023/528, H01L023/538, H01L023/64, H01L023/66
  • 专利详细信息:   CN115985888-A 18 Apr 2023 H01L-023/538 202342 Chinese
  • 申请详细信息:   CN115985888-A CN10154409 23 Feb 2023
  • 优先权号:   CN10154409

▎ 摘  要

NOVELTY - Integrated vertical device has a silicon carbide substrate for using the natural bonding generated by the graphene-silicon carbide epitaxy system during the epitaxial growth process. Functional devices are respectively arranged on the Si surface of the silicon carbide substrate and the C surface of the silicon carbide substrate. The silicon carbide substrate is used as a capacitor. The integration between the two functional devices is completed by capacitive coupling. A graphene field effect tube is attached to a Si surface of a silicon carbide substrate. A silicon carbide Schottky diode is attached to the C surface of the silicon carbide substrate (5). The graphene field effect tube has a source/drain electrode (1), a gate insulating layer (2), a gate (3), and graphene channel (4). USE - Integrated vertical device obtained by directly interconnecting capacitor coupling in semiconductor field. ADVANTAGE - The device avoids the process limit of preparing integrated vertical device needing to use wafer bonding integration after preparing different substrate (wafer), different parts of the vertical device are prepared at the same time on two base surfaces of the same substrate. The substrate after the preparation method does not need wafer-bonding to finish the interconnection and realize performance, saves the preparation steps of the integrated vertical devices, reduces the preparation cost of the devices, and avoids respectively preparing the electrodes on the silicon carbide side and the graphene side. DETAILED DESCRIPTION - An INDEPENDENT CLAIM is also included for a preparation method of integrated vertical device by directly interconnecting capacitor coupling. DESCRIPTION OF DRAWING(S) - The drawing shows a sectional view of the integrated vertical device obtained by directly interconnecting capacitor coupling in semiconductor field. 1Source/drain electrode 2Gate insulating layer 3Gate 4Graphene channel 5Silicon carbide substrate