• 专利标题:   Forming at least one resistive memory array over substrate involves forming word line on each of layer stacks within unfilled volumes of line trenches, where lower bit lines comprise carbon-based conductive material containing hybridized carbon atoms, upper bit lines comprise conductive material.
  • 专利号:   US2022285612-A1
  • 发明人:   LI L, CHEN T, CHENG C, CHIANG H
  • 专利权人:   TAIWAN SEMICONDUCTOR MFG CO LTD
  • 国际专利分类:   H01L027/24, H01L045/00
  • 专利详细信息:   US2022285612-A1 08 Sep 2022 H01L-045/00 202274 English
  • 申请详细信息:   US2022285612-A1 US750484 23 May 2022
  • 优先权号:   US715216, US750484

▎ 摘  要

NOVELTY - Forming at least one resistive memory array over substrate involves forming array of rail structures that extend along first horizontal direction over substrate; forming dielectric isolation structures extending along second horizontal direction over array of rail structures; forming layer stack of resistive memory material layer and selector material layer within each of line trenches; and forming word line on each of layer stacks within unfilled volumes of line trenches. The lower bit lines comprise first material selected from carbon-based conductive material containing hybridized carbon atoms in hexagonal arrangement and conductive material other than carbon-based conductive material; and upper bit lines comprise second material that is different from first material and selected from carbon-based conductive material and conductive material other than carbon-based conductive material. USE - Method for forming at least one resistive memory array over substrate. ADVANTAGE - The method minimums thickness during scaling of dimensions because the metallic nitride liner needs to fully function as an adhesion promotion layer for the metallic fill material and as a diffusion barrier layer, and provides high resistivity with scaling of dimensions. DETAILED DESCRIPTION - Forming at least one resistive memory array over substrate involves forming array of rail structures that extend along first horizontal direction over substrate, where each of rail structures comprises respective lower bit line and respective upper bit line; forming dielectric isolation structures extending along second horizontal direction over array of rail structures, sidewalls of rail structures are physically exposed to line trenches located between neighboring pairs of dielectric isolation structures; forming layer stack of resistive memory material layer and selector material layer within each of line trenches; and forming word line on each of layer stacks within unfilled volumes of line trenches. The lower bit lines comprise first material selected from carbon-based conductive material containing hybridized carbon atoms in hexagonal arrangement and conductive material other than carbon-based conductive material; and upper bit lines comprise second material that is different from first material and selected from carbon-based conductive material and conductive material other than carbon-based conductive material. INDEPENDENT CLAIMS are included for: (1) a method of forming a resistive memory device; and (2) a method of forming a memory device.