▎ 摘　　要

NOVELTY - The FET has a silicon dioxide isolation layer (2) that is arranged on a window (3). The side surfaces of window are provided with the power poles (4,5). The graphite electric conduction passage layers (6) are arranged on the power poles. The power poles and window are mutually contacted with the n-type silicon substrate (1). The power poles are made of aluminum, gold or gold chromium. A grid electrode (7) is arranged at lower end of substrate and is made of gallium indium or aluminum. USE - Contact graphene/silicon-based barrier field effect transistor (FET) used during manufacture of computer, communication device, aircraft and vehicle. ADVANTAGE - The carrier migration rate of graphene channel is measured and controlled effectively. The manufacturing cost of FET is reduced, since structure of FET is simplified. The regulating effect of FET is improved. The manufacturing process of FET is simplified. DETAILED DESCRIPTION - An INDEPENDENT CLAIM is included for a preparation method of contact graphene/silicon-based barrier FET. DESCRIPTION OF DRAWING(S) - The drawing shows a schematic view of the contact graphene/silicon-based barrier FET. N-type silicon substrate (1) Silicon dioxide isolation layer (2) Window (3) Power pole (4,5) Graphite electric conduction passage layer (6) Grid electrode (7)