• 专利标题:   Graphene transistor used for integrated circuit, is bottom gate-type transistor comprising gate layer containing primary graphene film and primary alumina layer, which is arranged between substrate and channel, and gate insulating film.
  • 专利号:   JP2013152969-A, JP5656888-B2
  • 发明人:   OKAI M
  • 专利权人:   HITACHI LTD, HITACHI LTD
  • 国际专利分类:   C01B031/02, H01L021/3065, H01L021/316, H01L021/336, H01L021/8234, H01L027/08, H01L027/088, H01L029/06, H01L029/786
  • 专利详细信息:   JP2013152969-A 08 Aug 2013 H01L-029/786 201355 Pages: 13 Japanese
  • 申请详细信息:   JP2013152969-A JP011692 24 Jan 2012
  • 优先权号:   JP011692

▎ 摘  要

NOVELTY - A graphene transistor is bottom gate-type transistor comprising gate layer which is arranged between a substrate (100) and a channel. The gate layer consists of primary graphene film (104), and primary alumina layer (103) pattern formed on the substrate. A gate insulating film (106) is formed between the gate layer and the channel, which is just overhead of the base of gate layer. The gate insulating film has 3-layer structure comprising secondary alumina layer (107), silica layer (108) and tertiary alumina layer (109) formed on just overhead of the silica layer. USE - Graphene transistor is used for integrated circuit (claimed). ADVANTAGE - The graphene transistor has excellent stability, reliability, electrical property and durability, and is economically manufactured. DETAILED DESCRIPTION - A graphene transistor is bottom gate-type transistor comprising gate layer which is arranged between a substrate and a channel. The gate layer consists of primary graphene film, and primary alumina layer pattern formed on the substrate. A gate insulating film is formed between the gate layer and the channel, which is just overhead of the base of gate layer. The gate insulating film has 3-layer structure comprising secondary alumina layer which is formed on just overhead of the gate layer, silica layer formed on just overhead of secondary alumina layer and tertiary alumina layer formed on just overhead of the silica layer. The channel consists of secondary graphene film (110). An INDEPENDENT CLAIM is included for graphene transistor integrated circuit, which is obtained by integrating graphene transistor. DESCRIPTION OF DRAWING(S) - The drawing shows a schematic view of the graphene transistor. Substrate (100) Silicon single crystal substrate (101) Primary alumina layer (103) Primary graphene film (104) Gate electrode (105) Gate insulating film (106) Secondary alumina layer (107) Silica layer (108) Tertiary alumina layer (109) Secondary graphene layer (110) Source electrode (111) Drain electrode (112)