▎ 摘　　要

NOVELTY - The FET (900A) has channel material (203) located on a substrate e.g. silicon substrate (201), where the channel material comprises graphene or nanostructure. A gate (301) is located on a portion of the channel material. A contact is aligned to the gate, and comprises metal silicide, metal carbide and metal. The contact is located over a source region and a drain region of the FET. The source region and the drain region are located on another portion of the channel material. The nanostructure comprises carbon nanotubes or semiconductor nanowires. USE - Self-aligned contact and gate graphene/nanostructure based FET. ADVANTAGE - The contact material is converted to metal carbide or metal silicide so as to reduce contact resistance of the contact material. The source/drain regions' contacts are formed using the contact material with low contact resistance so as to obtain better FET operating characteristics. DETAILED DESCRIPTION - The FET includes a gate dielectric layer comprising hafnium oxide, titanium nitride and tungsten. DESCRIPTION OF DRAWING(S) - The drawing shows a schematic view of a nanostructure FET with a self-aligned contact and a gate after patterning contact material. Silicon substrate (201) Channel material (203) Gate (301) Sidewall spacers (302) Self-aligned contact and gate graphene/nanostructure based FET (900A)