▎ 摘　　要

NOVELTY - Integrated chip comprises lower side inner connecting dielectric layer configured on substrate. The inner connecting line is configured on lower side of inner connecting layer. The protective pad layer is directly arranged around outer side wall of inner connection line and upper surface of first inner connection line. The first etching stop layer is arranged directly on upper side of outer surface of first inner connecting connection layer. The second inner connecting through hole is extended through second inner connection through hole, and is electrically connected to inner connection. The protective pad is provided with graphene. The second insulating layer is configured between first insulating line and inner communication line. USE - Integrated chip. ADVANTAGE - The inner connecting line through hole is extended through the second dielectric layer, which is directly configured on the protective pad layer, and electrically coupled to the inner connecting lines, so that the integrated chip can be formed in a simple and cost-effective manner. The integrated chip has improved electrical properties.