• 专利标题:   Manufacturing method of semiconductor device, involves forming graphene layer on catalyst layer after planarizing exposed surface of catalyst layer by oxidation-treating.
  • 专利号:   JP2013172083-A, JP5801221-B2, US2017229301-A9, US2017316973-A1, US10325805-B2
  • 发明人:   YAMAZAKI Y, KATAGIRI M, SAKAI T, SAKUMA H, KITAMURA M, SAKATA A, WADA M, KAJITA A, MIZUSHIMA I, SAKUMA N
  • 专利权人:   TOSHIBA KK, TOSHIBA KK, KITAMURA M, SAKATA A, WADA M, YAMAZAKI Y, KATAGIRI M, KAJITA A, SAKAI T, SAKUMA N, MIZUSHIMA I, TOSHIBA KK
  • 国际专利分类:   C23C016/26, H01L021/28, H01L021/285, H01L021/3205, H01L021/768, H01L023/532, B82Y040/00, H01L021/02
  • 专利详细信息:   JP2013172083-A 02 Sep 2013 H01L-021/3205 201360 Pages: 25 Japanese
  • 申请详细信息:   JP2013172083-A JP036377 22 Feb 2012
  • 优先权号:   JP036377

▎ 摘  要

NOVELTY - The method involves forming a co-catalyst layer which has a face centered cubic structure above the surface of a semiconductor substrate. The co-catalyst layer is formed so that the plane of the face centered cubic structure is orientated in parallel with the surface of the semiconductor substrate. An exposed surface of the catalyst layer is planarized by oxidation-treating with respect to the catalyst layer. A graphene layer is formed on the catalyst layer. USE - Manufacturing method of semiconductor device such as large-scale integration (LSI) device. ADVANTAGE - Since the graphene layer is formed on the catalyst layer, THE semiconductor device can be manufactured with the high quality. DESCRIPTION OF DRAWING(S) - The drawing shows a schematic view of the surface shows the catalyst layer oxidized and restored. Co-catalyst layer (40) Catalyst layer (50) Region of oxidized catalyst layer (50rd)