• 专利标题:   Double photoelectric grid structure based semiconductor wavelength detector, has upper and lower gates that utilizes thin film material and material of substrate to form coupling structure in which two photogates control channel together.
  • 专利号:   CN112382692-A, CN112382692-B
  • 发明人:   WAN J, DENG J
  • 专利权人:   UNIV FUDAN
  • 国际专利分类:   H01L031/0224, H01L031/113, H01L031/18
  • 专利详细信息:   CN112382692-A 19 Feb 2021 H01L-031/113 202120 Pages: 8 Chinese
  • 申请详细信息:   CN112382692-A CN11110843 16 Oct 2020
  • 优先权号:   CN11110843

▎ 摘  要

NOVELTY - The detector has an upper gate (10) and a lower gate that respectively utilizes thin film material and material of a substrate (1) to form a coupling structure in which two photogates control a channel together, where the two photogates belongs to different doping types and spectral responses. The substrate is selected as a light doping semiconductor substrate. An upper channel (5) is selected as a semiconductor channel. The substrate is provided with a buried oxide layer (2), a source terminal (3), a drain terminal (4). Insulating gate dielectric (11) is filled between the upper gate and the substrate. USE - Double photoelectric grid structure based semiconductor wavelength detector. ADVANTAGE - The detector is simple in structure, and extracts wavelength of the incident light by the transfer curve of the scanning device so that subsequent complex amplifying and processing circuit is not needed. The detector utilizes upper gate thin film material to improve wavelength detection range of the detector so that photoelectric response is very high under the very weak light intensity. The detector reduces wavelength detection error and production cost and simplifies preparation process. DETAILED DESCRIPTION - An INDEPENDENT CLAIM is included for a semiconductor wavelength detector manufacturing method. DESCRIPTION OF DRAWING(S) - The drawing shows a schematic diagram of a double photoelectric grid structure based semiconductor wavelength detector. (Drawing includes non-English language text). Substrate (1) Buried oxide layer (2) Source terminal (3) Drain terminal (4) Upper channel (5) Upper gate (10) Insulating gate dielectric (11)