• 专利标题:   Method for preparing quantum hall device, involves forming superconducting thin film layer on substrate, covering with dielectric thin film layer, and forming graphene layer, followed by forming metal electrode.
  • 专利号:   CN106025061-A, CN106025061-B
  • 发明人:   WANG H, XIE H, WANG X, XIE X, JIANG M
  • 专利权人:   SHANGHAI INST MICROSYSTEM INFORMATION, SHANGHAI INST MICROSYSTEM INFORMATION
  • 国际专利分类:   H01L039/12, H01L043/04, H01L043/06, H01L043/10, H01L043/14
  • 专利详细信息:   CN106025061-A 12 Oct 2016 H01L-043/04 201675 Pages: 15 Chinese
  • 申请详细信息:   CN106025061-A CN10552773 14 Jul 2016
  • 优先权号:   CN10552773

▎ 摘  要

NOVELTY - A quantum hall device preparing method involves forming first superconducting thin film layer on substrate, covering first superconducting thin film layer with first dielectric thin film layer and forming graphene layer or semiconductor thin film layer on surface of the first dielectric thin film layer. The resultant surface layer is formed by second dielectric thin film layer and second superconducting thin film layer to obtain layered substrate. The layered substrate is formed by metal electrode, which is in contact with graphene layer or semiconductor thin film layer. USE - Method for preparing quantum hall device. ADVANTAGE - The method enables preparing the quantum hall device with high speed, low power consumption and better effect of reducing technical difficulty of device fabrication. DETAILED DESCRIPTION - A quantum hall device preparing method involves forming a first superconducting thin film layer on a substrate, covering the first superconducting thin film layer with a first dielectric thin film layer and forming a graphene layer or a semiconductor thin film layer having predetermined pattern on the surface of the first dielectric thin film layer. The resultant surface layer is formed by a second dielectric thin film layer and a second superconducting thin film layer from bottom to top to obtain a layered substrate. The layered substrate is formed by a metal electrode, which is in contact with the graphene layer or the semiconductor thin film layer.