• 专利标题:   Semiconductor device has through vias each formed through graphene wiring structure and connection insulating film to connect part of semiconductor elements to graphene wires.
  • 专利号:   US2014070425-A1, JP2014053530-A, US8907495-B2, JP5851369-B2
  • 发明人:   WADA M, KAJITA A, ISOBAYASHI A, SAITO T
  • 专利权人:   TOSHIBA KK, TOSHIBA KK, TOSHIBA KK
  • 国际专利分类:   H01L021/768, H01L023/538, C01B031/02, H01L021/3205, H01L023/522, H01L023/532, B82Y040/00, H01L029/06
  • 专利详细信息:   US2014070425-A1 13 Mar 2014 H01L-023/538 201421 Pages: 13 English
  • 申请详细信息:   US2014070425-A1 US846513 18 Mar 2013
  • 优先权号:   JP198266

▎ 摘  要

NOVELTY - The semiconductor device has semiconductor elements (14) formed on silicon substrate (11), and a graphene wiring structure (30) stuck on substrate with a connection insulating film (21,22) disposed therebetween and that includes graphene wires. The through vias (40) are formed through the graphene wiring structure and connection insulating film. Each via connects part of the semiconductor element to graphene wire. The graphene layer includes catalyst formed of one of cobalt and nickel metals to grow graphene layer (33) formed on catalyst layer (32). USE - Semiconductor device. ADVANTAGE - Enhances element characteristic since graphene wiring structure of extremely low resistance is applied to the low-temperature coping device element structure and first and second substrates are respectively formed at adequate temperatures. Obtains contact resistance since connection area becomes large by connecting the side surfaces of through vias to the graphene wires. The wiring process of graphene layer is easily performed since extra amount of graphene layers is reduced. Reduces manufacturing cost and steps and performs process easily from the viewpoint of smoothness of the surface by eliminating need to provide support substrate at the graphene lead-out time. DETAILED DESCRIPTION - An INDEPENDENT CLAIM is included for a semiconductor device manufacturing method. DESCRIPTION OF DRAWING(S) - The drawing shows a cross sectional view of the schematic structure of a semiconductor device. Silicon substrate (11) Semiconductor elements (14) Connection insulating films (21,22) Graphene wiring structure (30) Catalyst layer (32) Graphene layer (33) Through vias (40)