▎ 摘　　要

NOVELTY - The method involves scanning a first read level window for a first candidate read level that activates a fewest number of memory cells in relation to other candidate read levels within the first read level window. The first read level window is configured to test read levels between two adjacent memory states. A second read level window is configured for a second candidate read level based on a correlation between at least one of the two adjacent memory states and one or more other adjacent memory states associated with the second read level window. The second read level window is scanned for a second candidate read level that activates the fewest number of memory cells in relation to other candidate read levels within the second read level window. A read operation is configured to use the first candidate read level and the second candidate read level. USE - Method of performing read scan operation on memory used in computing device such as smartphone, desktop computer, laptop computer, rack-mounted computer system, computer server, or a tablet computer device. Uses include but are not limited to memristor memory, programmable metallization cell memory, phase-change memory, ovonic unified memory, chalcogenide RAM, or C-RAM, two-dimensional or three-dimensional NOT-AND (NAND) FLASH memory , NOT-OR (NOR) FLASH memory, nano RAM or NRAM, nanocrystal wire-based memory, silicon-oxide based sub-10 nanometer process memory, graphene memory, silicon-Oxide-Nitride-oxide-silicon (SONOS), memory, magneto-resistive RAM (MRAM), etc. ADVANTAGE - The optimal performance of the memory cells is ensured, while default read levels are set at the time of manufacture. Certain errors are prevented from occurring, without the performance penalty of retrying reads or performing other remedial measures for the prevented error. DETAILED DESCRIPTION - INDEPENDENT CLAIMS are included for the following: (1) an apparatus for performing read scan operation on memory; and (2) a system for performing read scan operation on memory. DESCRIPTION OF DRAWING(S) - The drawing shows a block diagram of the storage device. Autonomous storage device (200) Memory array (202) Row decoder (210) State machine (214) Power control (218)