▎ 摘　　要

NOVELTY - The transistor has a gate oxide layer (7) whose surface is provided with a polycrystalline silicon gate (8) that is formed with a passivation layer (6). A source electrode metal (9) is connected with an N-type source region (5) and a P-type body contact region (4). A P-type base region (3) is provided with a graphite strip (11). Two ends of the graphite strip are respectively connected with a boundary formed between the N-type source region and the P-type base region and the boundary formed between the P-type base region and a N-type drift region (2). The graphite strip (11) is located at an inner surface of the P-type base region. USE - Graphene channel silicon carbide power semiconductor transistor. ADVANTAGE - The transistor increases constant on-resistance and current transmission capacity of a conducting channel, utilizes the graphene strip in the P-type base region so as to enhance auxiliary depletion effect, and reduces off-state leakage current so as to increase breakdown voltage. DESCRIPTION OF DRAWING(S) - The drawing shows a sectional view of a graphene channel silicon carbide power semiconductor transistor. N-type drift region (2) P-type base region (3) P-type body contact region (4) N-type source region (5) Passivation layer (6) Gate oxide layer (7) Polycrystalline silicon gate (8) Source electrode metal (9) Graphene strip (11)