• 专利标题:   Metal oxide semiconductor memory comprises silicon substrate, two-layer structure of ultra-thin asymmetric alumina/hafnia as tunnel oxide layer, four-layer graphene nanoflake as charge storage layer, gate oxide layer and gate.
  • 专利号:   CN110211963-A
  • 发明人:   CHENG Q, JI N, QU K, LI G, WANG W
  • 专利权人:   UNIV NANJING POST TELECOM
  • 国际专利分类:   H01L021/28, H01L027/1157, H01L029/423, H01L029/51
  • 专利详细信息:   CN110211963-A 06 Sep 2019 H01L-027/1157 201984 Pages: 7 Chinese
  • 申请详细信息:   CN110211963-A CN10500369 11 Jun 2019
  • 优先权号:   CN10500369

▎ 摘  要

NOVELTY - A metal oxide semiconductor memory comprises silicon substrate, tunnel oxide layer, charge storage layer, gate oxide layer and gate, arranged from bottom to top. The tunnel oxide layer is two-layer structure of ultra-thin asymmetric alumina/hafnia. The charge storage layer is four-layer graphene nanoflake. USE - Metal oxide semiconductor memory. ADVANTAGE - The metal oxide semiconductor memory can enhance the memory retention capability while maintaining the charge retention rate, and has great potential in non-volatile memory devices, and is prepared by simple, easy, and economical method. DETAILED DESCRIPTION - An INDEPENDENT CLAIM is included for preparation of the metal oxide semiconductor memory.