▎ 摘　　要

NOVELTY - The method involves providing a substrate (100). A stack structure of the substrate is deposited. Multiple staggered stacked interlayer dielectric layers (200) and control gate layers (300) are formed on a surface of the substrate. The control gate layer is formed between adjacent interlayer dielectric layers, where the interlayer dielectric layer is an oxide and the control gate layer is a graphene layer. The stack structure of the substrate is etched. The interlayer dielectric layer and the control gate layer are etched to form a channel hole. USE - Oxide-graphene thin film stack-based method for preparing three-dimensional NOT-AND (NAND) flash memory. ADVANTAGE - The graphene layer has a thickness that can provide better electrical properties and mechanical strength because the thin graphene film has a very high mobility and a very high mechanical strength. The use of the thin graphene film makes it easy to achieve more than pre-specified layers of stacked layers of flush memory cells. DETAILED DESCRIPTION - An INDEPENDENT CLAIM is included for a three-dimensional NAND flash memory. DESCRIPTION OF DRAWING(S) - The drawing shows a schematic diagram illustrating a structure of the three-dimensional NAND flash memory based on the oxide-graphene thin film stack. Substrate (100) Interlayer dielectric layer (200) Control gate layer (300) Silicon epitaxial layer (400) Oxide-nitride-oxide structure (500)