• 专利标题:   Ion controllable transistor-based neuromorphic synaptic device for implementing e.g. neuromorphic computing, has solid electrolyte layer that is inserted between interlayer insulating film and gate area.
  • 专利号:   US2022036168-A1, KR2022014794-A, KR2424747-B1
  • 发明人:   YU J, CHOI Y, MAN Y J
  • 专利权人:   KOREA ADVANCED SCI TECHNOLOGY INST, KOREA ADVANCED SCI TECHNOLOGY INST
  • 国际专利分类:   G06N003/063, H01L021/265, H01L027/088, H01L029/49, H01L029/66, H01L029/78, H01L027/11563, H01L029/792
  • 专利详细信息:   US2022036168-A1 03 Feb 2022 G06N-003/063 202214 English
  • 申请详细信息:   US2022036168-A1 US385329 26 Jul 2021
  • 优先权号:   KR094128, KR177102

▎ 摘  要

NOVELTY - An ion controllable transistor-based neuromorphic synaptic device (100) comprises: a channel area (120) formed on a semiconductor substrate; a source area (130) and a drain area formed at both sides of the channel area, respectively; an interlayer insulating film (150) provided on channel area; a gate area on the interlayer film; and a solid electrolyte layer inserted between the film and gate area. A main unit analogically updates channel conductance by movement of ions present in the layer In response to a voltage pulse being applied to the gate area, and analogically expresses a synaptic weight by updating the conductance. The channel area comprises at least one semiconductor material of silicon, germanium, a group III-V compound, and a 2-D material including carbon nanotube, molybdenum disulfide, and graphene. USE - Ion controllable transistor-based neuromorphic synaptic device for implementing a memory and a neuromorphic computing. ADVANTAGE - The device can secure a stable device characteristic and achieve a large-scale process and integration by using a solid electrolyte layer that analogically updates a channel conductance and a synaptic weight by movement of ions present in the solid electrolyte layer. The device ensures that a memory operation can be implemented through a linear movement of cations and anions present in a channel area and can memorize a change in the channel area caused by ion movement as the synaptic weight, so that the device can implement a spike timing dependent plasticity (STDP), short term plasticity, and long-term plasticity characteristics like a synapse of a real living organism by adjusting a frequency and a width of a voltage pulse applied to a gate area or by adjusting materials that form a channel, solid electrolytes area, and a source area. DETAILED DESCRIPTION - INDEPENDENT CLAIMS are included for: (1) a gate-first manufacturing method of an ion controllable transistor-based neuromorphic synaptic device; (2) a gate-last manufacturing method of an ion controllable transistor-based neuromorphic synaptic device; and (3) a synaptic array comprising ion controllable transistor-based neuromorphic synaptic device. DESCRIPTION OF DRAWING(S) - The drawing shows aa perspective view of the ion controllable transistor-based neuromorphic synaptic device. Controllable transistor-based neuromorphic synaptic device (100) Semiconductor substrate (110) Channel area (120) Source area (130) Interlayer insulating film (150)