• 专利标题:   Method for forming e.g. transistor, involves performing anneal process, removing metal layer after performing anneal process, and etching graphene to define channel from graphene, where carbon layer is transformed into graphene.
  • 专利号:   US2018122909-A1, US10269902-B2
  • 发明人:   LIN M, LIN S, LEE S
  • 专利权人:   TAIWAN SEMICONDUCTOR MFG CO LTD, UNIV TAIWAN NAT, UNIV TAIWAN NAT
  • 国际专利分类:   H01L029/16, H01L029/423, H01L029/66, H01L029/786, H01L029/10, H01L029/49
  • 专利详细信息:   US2018122909-A1 03 May 2018 H01L-029/16 201832 Pages: 21 English
  • 申请详细信息:   US2018122909-A1 US852391 22 Dec 2017
  • 优先权号:   US455992, US852391

▎ 摘  要

NOVELTY - The method involves forming a dielectric layer. A carbon layer is formed over the dielectric layer. A metal layer is formed over the carbon layer. An anneal process is performed, where some of the carbon layers is transformed into graphene during the anneal process. The metal layer is removed after performing the anneal process and the graphene is etched to define a channel (110) from the graphene, where a gate extends around the source and drain regions from a first side (111) of the channel to a second side (114) of the channel opposite the first side after performing the etching process. USE - Method for forming a semiconductor device i.e. transistor. ADVANTAGE - The method enables utilizing one of in-plane gates to improve electron mobility of a semiconductor device by positioning the in-plane gate in a same plane as one of a graphene channel, a first active area or a second active area. DETAILED DESCRIPTION - The carbon layer is an amorphous carbon layer. DESCRIPTION OF DRAWING(S) - The drawing shows a top view of a semiconductor device at a stage of fabrication. Semiconductor device (100) Active Area (106) Channel (110) Sides (111, 114) In-plane Gate (116)