• 专利标题:   Electrical conductor for microelectronic device, includes graphene heterolayer comprising alternating layers of graphene and layers of barrier material.
  • 专利号:   US2018240886-A1, WO2018156622-A1, US10181521-B2
  • 发明人:   VENUGOPAL A, COOK B S, COLOMBO L, DOERING R R
  • 专利权人:   TEXAS INSTR INC, TEXAS INSTR INC, TEXAS INSTR JAPAN CO LTD
  • 国际专利分类:   H01L023/66, H01L029/66, H01L029/778, H01L049/02, B32B007/00, B82Y030/00, B82Y040/00, H01L027/13, H01L029/16
  • 专利详细信息:   US2018240886-A1 23 Aug 2018 H01L-029/66 201857 Pages: 19 English
  • 申请详细信息:   US2018240886-A1 US437818 21 Feb 2017
  • 优先权号:   US437818

▎ 摘  要

NOVELTY - The electrical conductor (106) includes a graphene heterolayer (108) comprising alternating layers of graphene (110) and layers of barrier material (112). Each layer of graphene has one to two atomic layers of graphene. Each layer of the barrier material has one to three layers selected from the group consisting of hexagonal boron nitride, cubic boron nitride, and aluminum nitride. USE - Electrical conductor for microelectronic device (claimed). Uses include but are not limited to an electrical conductor the electrical conductor which provides: an interconnect of the microelectronic device; a gate of a thin film transistor of the microelectronic device; an antenna connected to a bandgap converter of the microelectronic device; a plate of a capacitor of the microelectronic device; or a meta-atom of a meta-material structure of the microelectronic device. ADVANTAGE - Including bernal bilayer graphene in the graphene layers of the graphene heterolayers may advantageously improve electrical conductivity of the graphene heterolayers compared to dual layers of graphene having other configurations. Using the additive process to form multiple levels of split-ring resonators may significantly reduce fabrication cost and complexity for the microelectronic device compared to using a photolithographic process and etch process for each level. DETAILED DESCRIPTION - An INDEPENDENT CLAIM is also included for a method of forming a microelectronic device. DESCRIPTION OF DRAWING(S) - The drawing is a cross section of a microelectronic device containing an electrical conductor including a graphene heterolayer. Lower interconnect (104) Electrical conductor (106) Graphene heterolayer (108) Layers of graphene (110) Layers of barrier material (112)