• 专利标题:   Manufacturing method of wiring structure for metal oxide semiconductor transistor of e.g. semiconductor memory used in electronic device, involves moving portion on catalyst material and film so as to remain graphene only in groove.
  • 专利号:   JP2015061042-A, JP6225596-B2
  • 发明人:   SATO M
  • 专利权人:   DOKURITSU GYOSEI HOJIN SANGYO GIJUTSU SO, FUJITSU LTD
  • 国际专利分类:   H01L021/3205, H01L021/768, H01L023/532
  • 专利详细信息:   JP2015061042-A 30 Mar 2015 H01L-021/3205 201525 Pages: 15 Japanese
  • 申请详细信息:   JP2015061042-A JP195699 20 Sep 2013
  • 优先权号:   JP195699

▎ 摘  要

NOVELTY - The method involves forming a groove (25a) in an insulating film (25). A carbon (26) is formed on the insulating film, so that the inside of the groove is embedded. A catalyst material (27) is formed on the carbon. The carbon is heat-processed and made into graphene laminated on multiple layers. The portion on the catalyst material and the insulating film of graphene is moved so as to make the graphene to remain only in the groove. USE - Manufacturing method of wiring structure for metal oxide semiconductor (MOS) transistor of semiconductor device such as semiconductor memory, rewirings, wafer level package (WLP), etc used in electronic device. ADVANTAGE - Simple wiring with low electrical resistance and low-heat resistance is obtained easily and reliably, and reliable wiring structure is achieved. DETAILED DESCRIPTION - An INDEPENDENT CLAIM is included for the wiring structure. DESCRIPTION OF DRAWING(S) - The drawing shows a sectional view illustrating the manufacture of wiring structure. (Drawing includes non-English language text) Source/drain regions (14) Insulating film (25) Groove (25a) Carbon (26) Catalyst material (27)