• 专利标题:   Semiconductor device has wiring layer which is formed of graphene and in contact with carbon nanotube on upper surface of portion of catalytic layer outside hole so that portions of catalytic layer are perforated and continuous films.
  • 专利号:   US2014061916-A1, JP2014053433-A, US8981569-B2, JP5755618-B2
  • 发明人:   SAITO T, WADA M, ISOBAYASHI A, YAMAZAKI Y, KAJITA A
  • 专利权人:   TOSHIBA KK, TOSHIBA KK
  • 国际专利分类:   H01L021/768, H01L023/522, C01B031/02, H01L021/3205, H01L023/532, B82Y030/00, H01L021/02, H01L023/48, H01L051/00, H01L051/44
  • 专利详细信息:   US2014061916-A1 06 Mar 2014 H01L-023/522 201419 Pages: 27 English
  • 申请详细信息:   US2014061916-A1 US842787 15 Mar 2013
  • 优先权号:   JP196585

▎ 摘  要

NOVELTY - The device has a catalytic layer (16) which is formed at a bottom of a hole (14) at a peripheral wall of hole, and on an upper surface of an insulating film (12) outside the hole. A contact (17) is formed using a carbon nanotube on a portion of catalytic layer. A wiring layer (11) is formed of graphene and provided in contact with carbon nanotube on upper surface of a portion of catalytic layer outside the hole so that the portions of catalytic layer provided at the bottom of hole and outside the hole are provided to be the perforated and continuous films respectively. USE - Semiconductor device. ADVANTAGE - Since the portion of the catalytic layer that is formed at the bottom of the via hole is made perforated, and the portion of the catalytic layer that is formed on the upper surface of the insulating film is made continuous, the carbon nanotubes (CNT) and the graphene layer can be formed simultaneously so that the contact area between the CNT and the graphene layer is greater so as to reduce the contact resistance. Thus, the low resistance wiring can be realized while reducing the number of required manufacturing steps. The cap layer prevents the wiring layer from defects during processing the graphene layer. DETAILED DESCRIPTION - An INDEPENDENT CLAIM is included for a method for manufacturing semiconductor device. DESCRIPTION OF DRAWING(S) - The drawing shows a cross sectional view of the semiconductor device. Wiring layer (11) Insulating film (12) Hole (14) Catalytic layer (16) Contact (17)