▎ 摘　　要

NOVELTY - The FET has channel with graphene layer (1) that is provided on semiconductor substrate (10), and source and drain electrodes (S,D) comprising metal, and gate electrode (G). The channel and source and drain electrodes are mutually connected via semiconductor layer and silicon carbide layer (2) having thickness of about 100 nm or less. USE - FET such as N-type FET and P-type FET for complementary type logic circuit (all claimed). ADVANTAGE - The FET that does not exhibit ambipolar properties can be obtained, such that characteristics of FET can be improved. The power consumption of FET can be reduced. DESCRIPTION OF DRAWING(S) - The drawings show the sectional views of the N-type and P-type FETs. (Drawing includes non-English language text) Graphene layer (1) Silicon carbide layer (2) Semiconductor substrate (10) Drain electrode (D) Gate electrode (G) Source electrode (S)