• 专利标题:   Graphene-based vertical heterostructure for use in electronic device for LED applications, has graphene layers separated from semiconductor layers by insulating layer and stacked sequentially in order described to form laminate structure.
  • 专利号:   WO2016203184-A1, KR2018037177-A, EP3311410-A1, CN108064420-A, US2018158913-A1, JP2018519664-W
  • 发明人:   WITHERS F, NOVOSELOV K
  • 专利权人:   UNIV MANCHESTER, NANOCO 2D MATERIALS LTD, NANOCO TECHNOLOGIES LTD
  • 国际专利分类:   H01L029/16, H01L029/51, H05B033/14, H05B033/20, H05B033/26, H01L029/15, H01L029/267, H01L029/41, H01L033/06, H01L033/26, H01L029/24, H01L033/32, H01L033/34
  • 专利详细信息:   WO2016203184-A1 22 Dec 2016 H01L-029/51 201703 Pages: 45 English
  • 申请详细信息:   WO2016203184-A1 WOGB051784 18 Jun 2015
  • 优先权号:   CN80081002, EP733868, JP566029, KR701302, WOGB051784, US15737158

▎ 摘  要

NOVELTY - The heterostructure has two graphene layers, an insulating layer and two semiconductor layers. The graphene layers are separated from the semiconductor layers by the insulating layer. The first graphene layer and the second graphene layer comprise a graphene e.g. pristine graphene and chemically modified graphene, or modified graphene, where the graphene layers are stacked sequentially in an order described to form a laminate structure, the heterostructure is mounted on a substrate, and thickness of the insulating layers is same in each case. USE - Graphene-based vertical heterostructure for use in an electronic device for LED applications. ADVANTAGE - The heterostructure exhibits extrinsic quantum efficiency of nearly 10% so as to enhance quantum efficiency in an efficient manner. The heterostructure increases overall thickness of a tunnel barrier and enhances probability for injected carriers to recombine radiatively. The heterostructure increases crystal quality of transition metal dichalcogenides and reduces graphene lead resistance. DESCRIPTION OF DRAWING(S) - The drawing shows a schematic view of an architecture of single-quantum-well heterostructure.