• 专利标题:   Electric-induction reduction of graphene oxide in manufacture of integrated circuit, involves forming graphene layer on substrate, oxidizing graphene layer to form graphene oxide, and reducing graphene oxide using electric contact probe.
  • 专利号:   CN102502605-A
  • 发明人:   SUN Q, WEI H, ZHANG W, ZHOU P
  • 专利权人:   UNIV FUDAN
  • 国际专利分类:   C01B031/04
  • 专利详细信息:   CN102502605-A 20 Jun 2012 C01B-031/04 201280 Pages: 7 Chinese
  • 申请详细信息:   CN102502605-A CN10351180 09 Nov 2011
  • 优先权号:   CN10351180

▎ 摘  要

NOVELTY - A graphite layer is formed on a highly doped silicon chip substrate by chemical vapor deposition. The graphene layer is oxidized to form graphene oxide. The graphene oxide is then reduced using an electric contact probe. Graphene is conductive graphene, or a mixture of graphene and graphene oxide. USE - Electric-induction reduction of graphene oxide in manufacture of integrated circuits and other electronic devices. ADVANTAGE - The method controls the resistance of graphene oxide after reduction, and simplifies the manufacturing method of semiconductor devices.