• 专利标题:   Method for forming interconnection structure of integrated circuit, involves forming substrate between first graphene layer and dielectric layer, and providing conductive structure with second part of dielectric layer.
  • 专利号:   CN106952864-A
  • 发明人:   ZHANG H, ZHANG C
  • 专利权人:   SEMICONDUCTOR MFG INT SHANGHAI CORP, SEMICONDUCTOR MFG INT BEIJING CORP
  • 国际专利分类:   H01L021/768, H01L023/532
  • 专利详细信息:   CN106952864-A 14 Jul 2017 H01L-021/768 201761 Pages: 13 Chinese
  • 申请详细信息:   CN106952864-A CN10006671 06 Jan 2016
  • 优先权号:   CN10006671

▎ 摘  要

NOVELTY - The method involves forming a substrate between a first graphene layer and a dielectric layer. The first graphene layer is formed with an opening. A conductive material layer is formed with the first graphene layer. A conductive structure is provided with a second part of the dielectric layer. A second graphene layer is formed with a side wall of the conductive structure. The conductive material layer is made up of aluminum and a tungsten material. USE - Method for forming an interconnection structure of an integrated circuit (claimed). ADVANTAGE - The method enables achieving better conductivity of the interconnect structure. DETAILED DESCRIPTION - An INDEPENDENT CLAIM is also included for an interconnection structure. DESCRIPTION OF DRAWING(S) - The drawing shows a sectional view of a method for forming an interconnection structure of an integrated circuit.