• 专利标题:   Josephson junction device used as qubit in superconductivity-based quantum system, comprises planar arrangement comprising two-dimensional material layers forming junctions in preset distance to cause Josephson effect, and graphene layer.
  • 专利号:   US2021217946-A1, KR2021091582-A, US11349059-B2
  • 发明人:   KWON H, LEE J, LEE J H, SIN K H
  • 专利权人:   SAMSUNG ELECTRONICS CO LTD, SAMSUNG ELECTRONICS CO LTD
  • 国际专利分类:   H01L039/12, H01L039/24, H01L039/22, H01L039/02
  • 专利详细信息:   US2021217946-A1 15 Jul 2021 H01L-039/02 202165 English
  • 申请详细信息:   US2021217946-A1 US015512 09 Sep 2020
  • 优先权号:   KR004947

▎ 摘  要

NOVELTY - A Josephson junction device comprises a planar arrangement comprising a two-dimensional (2D) material layer (51), a graphene layer (53), and a 2D material layer (55) planarly arranged on a device substrate, where the 2D material layer (51) comprises at least one layer of a 2D material, the graphene layer forming a junction (A) with the 2D material layer (51), and the 2D material layer (55) forming a junction (B) with the graphene layer and comprising at least one layer of a 2D material, and a distance between the junctions (A) and (B) is within preset range to cause a Josephson effect. USE - Josephson junction device (claimed) used as qubit in superconductivity-based quantum system. ADVANTAGE - The Josephson junction device prevents an error from occurring in a portion where the Josephson effect is formed. DETAILED DESCRIPTION - An INDEPENDENT CLAIM is included for manufacture of the Josephson junction device, which involves forming a planar arrangement of a 2D material layer (51), a graphene layer, and a 2D material layer (55) in a state attached to an attachment surface of a stamp, attaching the planar structure to a device substrate by stamping the stamp onto the device substrate (10), and forming the Josephson junction device by removing a peripheral portion of the planar structure (50) by an etching process. DESCRIPTION OF DRAWING(S) - The drawing shows a schematic view of a Josephson junction device. Device substrate (10) Planar structure (50) Two-dimensional material layer (51, 55) Graphene layer (53) Protective layers (57, 59)