▎ 摘　　要

NOVELTY - The method involves forming a substrate with a graphene layer. A first photo-resist is formed with a self-alignment layer and the graphene layer. A second photo-resist is formed with the self-alignment layer. Central position of a slot is obtained. A source electrode is formed with a gate dielectric layer. A third photo-resist is formed with a photo-resist layer. The gate electrode is formed with the photo-resist layer and a gate structure. The source electrode and a drain electrode are generated. The first photo-resist and the second photo-resist are selected as a positive photo-resist. USE - Self-aligned graphene-based FET manufacturing method. ADVANTAGE - The method enables increasing performance of a graphene FET, stability and manufacturing efficiency. DESCRIPTION OF DRAWING(S) - The drawing shows a flow diagram illustrating a self-aligned graphene-based FET manufacturing method. '(Drawing includes non-English language text)'