▎ 摘　　要

NOVELTY - A top gate graphene field effect transistor comprises a semiconductor substrate, an insulation layer, a graphene conductive layer, a comb-type source/drain contact structure, a gate dielectric layer, metal source and drain electrodes and a gate metal. The insulating layer is provided on the semiconductor substrate. The graphene conductive layer is provided on the insulating layer, and the comb-type source/drain contact structure is provided on the graphene conductive layer. The gate dielectric layer is deposited in channel region between the comb-type source/drain contact structures. USE - Top gate graphene field effect transistor (claimed). ADVANTAGE - The top gate graphene field effect transistor is prepared by simple process, and has improved current injection efficiency and direct current and frequency characteristics, and reduced contact resistance. DETAILED DESCRIPTION - A top gate graphene field effect transistor comprises a semiconductor substrate, an insulation layer, a graphene conductive layer, a comb-type source/drain contact structure, a gate dielectric layer, metal source and drain electrodes and a gate metal. The insulating layer is provided on the semiconductor substrate. The graphene conductive layer is provided on the insulating layer, and the comb-type source/drain contact structure is provided on the graphene conductive layer. The gate dielectric layer is selectively deposited in a channel region between the comb-type source/drain contact structures. A source-drain electrode metal is selectively deposited on contact regions on both sides of the comb-type source/drain contact structure. The gate metal is selectively deposited on the gate dielectric layer of the channel region. An INDEPENDENT CLAIM is included for method for reducing ohmic contact of top gate graphene field effect transistor, which involves successively forming insulating layer and graphene conductive layer on the semiconductor substrate, spin-coating a photoresist on the semiconductor substrate, exposing comb-type source-drain contact structure, selectively peeling the metal, depositing gate dielectric layer on the graphene conductive layer, patterning the gate dielectric layer and graphene, selectively depositing source-drain metal on comb-source-drain contact structure, and depositing gate metal on the gate dielectric layer of the channel region.