• 专利标题:   Two-dimensional material structure for use in semiconductor device, has two-dimensional material layer formed on exposed surface of insulator, and another two dimensional material layer including two dimensional materials.
  • 专利号:   KR2023050987-A, US2023112883-A1
  • 发明人:   SEOL M, SHIN K W, KWON J, YOO M S, LEE C S, LEE C, YOO M, SHIN K
  • 专利权人:   SAMSUNG ELECTRONICS CO LTD, SAMSUNG ELECTRONICS CO LTD
  • 国际专利分类:   H01L029/08, H01L029/16, H01L029/66, H01L029/78, H01L021/02, H01L029/24, H01L029/76, H01L029/786
  • 专利详细信息:   KR2023050987-A 17 Apr 2023 H01L-029/78 202337 Pages: 20
  • 申请详细信息:   KR2023050987-A KR134444 08 Oct 2021
  • 优先权号:   KR134444

▎ 摘  要

NOVELTY - The structure has an insulator including a dielectric material, and another insulator formed on the former insulator. A two-dimensional material layer (321) is formed on an exposed surface of the insulator, and another two dimensional material layer (322) includes two dimensional materials having a two dimensional layered structure. The two dimensional layers are connected to each other, where two dimensional films include transition metal dichalcogenide (TMD), graphene or black phosphorus. The insulator is formed by low-pressure chemical vapor deposition (Low-Pressure CVD)3n4A. USE - Two-dimensional material structure for use in a semiconductor device (Claimed). ADVANTAGE - The structure improves performance of the channel while the channel has a nano-scale thickness. The limitation of scale-down can be overcome. The problems such as an increase in leakage current and a shift in threshold voltage can be prevented by forming the channel region with a small number of layers of a two-dimensional material, so that a field effect transistor with improved performance can be obtained and ensures contact resistance can be lowered to realize a more improved FET since the source electrode and the drain electrode are formed of a multi-layered 2D material. DETAILED DESCRIPTION - INDEPENDENT CLAIMS are also included for: a semiconductor device; and a method for manufacturing a semiconductor device. DESCRIPTION OF DRAWING(S) - The drawing shows a schematic representation of the two-dimensional material structure. 300Semiconductor device 311Dielectric Layer 321, 322Two-dimensional material layers 351Source Electrode 352Drain Electrode