▎ 摘　　要

NOVELTY - The device (100) has a transistor that comprises a gate structure (106) that is arranged over a semiconductor substrate (102). The semiconductor substrate has a planar top surface (104U), a channel region (115), a source region (111) and a drain region (113). A layer of a 2D material is arranged in one of source region, drain region or channel region. The layer of 2D material has a planar top surface, a planar bottom surface (104R), and a uniform vertical thickness. The planar top surface and the planar bottom surface of the layer of 2D material, are arranged parallel to a planar surface of the semiconductor substrate. USE - Planar transistor device in electronics industry. ADVANTAGE - The size of transistor devices, is reduced while improving their performance. The single-layer 2D materials can have many advantageous properties, such as high mechanical strength, high electronic and thermal conductivity and/or unique quantum mechanical effects. The direction of relative rotation can be different for different layers in the stack of the three 2D material layers. DESCRIPTION OF DRAWING(S) - The drawing shows the schematic view of the planar transistor device. Planar transistor device (100) Semiconductor substrate (102) Planar bottom surface (104R) Planar top surface (104U) Gate structure (106) Source region (111) Drain region (113) Channel region (115)