▎ 摘　　要

NOVELTY - The semiconductor device (100) has a peripheral circuit region (PERI) that includes a first substrate (201), a circuit element (SE) arranged on first substrate and that includes a gate stack and a spacer layer (255) set on both sides of gate stack, and a memory cell region (CELL) that includes a second substrate (101) set on first substrate and a channel structure (CH) that extends vertically on second substrate. The gate stack has a gate insulating layer. The second substrate includes polycrystalline silicon, a first gate electrode layer, a barrier metal layer set on first gate electrode layer, and a second gate electrode layer set on barrier metal layer and contains metal. The second gate electrode layer contains at least one of tungsten, copper, aluminum, molybdenum, and rubidium. The the barrier metal layer includes at least one of graphene, titanium nitride, titanium silicon nitride, tantalum nitride, tantalum silicon nitride, tungsten nitride, tungsten silicon nitride. USE - Semiconductor device. ADVANTAGE - Provides semiconductor device with secured reliability by employing different gate stack structures of circuit elements arranged at the peripheral circuit region of semiconductor device. DESCRIPTION OF DRAWING(S) - The drawing shows a schematic cross-sectional view of a semiconductor device. Semiconductor device (100) Second substrate (101) First substrate (201) Spacer layer (255) Memory cell region (CELL) Channel structure (CH) Peripheral circuit region (PERI) Circuit element (SE)