• 专利标题:   Construction method of interconnect structure for semiconductor structure involves forming first graphene layer within first trench and adjacent first metal layer that is formed within first trench and adjacent barrier layer.
  • 专利号:   US2014235051-A1, US9330970-B2
  • 发明人:   WANN C H, KO T
  • 专利权人:   TAIWAN SEMICONDUCTOR MFG CO LTD, TAIWAN SEMICONDUCTOR MFG CO LTD
  • 国际专利分类:   H01L021/768, H01L021/285, H01L021/44, H01L021/4763, H01L023/532
  • 专利详细信息:   US2014235051-A1 21 Aug 2014 H01L-021/768 201458 Pages: 18 English
  • 申请详细信息:   US2014235051-A1 US267592 01 May 2014
  • 优先权号:   US182368, US267592

▎ 摘  要

NOVELTY - The method involves forming a first dielectric material layer (60) on a substrate (52) having an integrated circuit (IC) device and etching the first dielectric material layer to form a first trench aligned with a device feature of the IC device. A barrier layer is formed in the first trench. A first metal layer is formed within the first trench and adjacent the barrier layer. A first graphene layer is formed within the first trench and adjacent the first metal layer. USE - Construction method of interconnect structure for semiconductor structure or integrated circuit structure. ADVANTAGE - The overall conductivity and further the reliability of the semiconductor structure are enhanced as carbon nanotubes and graphene are good conductive materials. DESCRIPTION OF DRAWING(S) - The drawing shows a sectional view of a semiconductor structure having an interconnect structure. Substrate (52) First dielectric material layer (60) Etch stop layers (62) First conductive feature (64) Second conductive feature (70)