▎ 摘 要
NOVELTY - A field effect transistor (100) comprises source electrode (120) on substrate (110); drain electrode (130) separated from the source electrode; channels (140) between the source electrode and the drain electrode, the channels being connected to the source electrode and the drain electrode and having a hollow closed cross-sectional structure when viewed in a first cross-section formed by a plane across the source electrode and the drain electrode in a direction perpendicular to the substrate; gate insulating layers (150) in the channels; and gate electrode (160) insulated from the source electrode and the drain electrode by the gate insulating layers. USE - A field effect transistor for electronic system used for a third generation communication system, e.g. code division multiple access (CDMA), global system for mobile communications (GSM), north American digital cellular (NADC), extended-time division multiple access (E-TDMA), and/or a communication interface protocol for the third generation communication system, e.g. wide band code division multiple access (WCDMA). ADVANTAGE - The field effect transistor may be highly miniaturized and may exhibit good electrical performance, thus may be applied to an integrated circuit device, and may realize a small size, low power consumption, and high performance. DETAILED DESCRIPTION - An INDEPENDENT CLAIM is also included for manufacture of field effect transistor, which involves alternately stacking sacrificial layers and insulating layers on a substrate to provide a stack structure; patterning the stack structure using a mask to provide a patterned stack structure; forming a source electrode and a drain electrode on both sides of the patterned stack structure; removing the sacrificial layers, leaving the insulating layers suspended between the source electrode and the drain electrode and separated from each other in a direction perpendicular to the substrate; forming channels by depositing a channel material on the insulating layers; depositing a gate insulating layer on the channels; and depositing a gate electrode on the gate insulating layer. DESCRIPTION OF DRAWING(S) - The drawing shows a cross-sectional view taken along line A-A of a perspective view of a field effect transistor. Field effect transistor (100) Substrate (110) Source electrode (120) Drain electrode (130) Channels (140) Gate insulating layers (150) Gate electrode (160)