▎ 摘　　要

NOVELTY - Manufacture (100) of three-dimensional semiconductor device involves forming (115) a bilayer sacrificial stack comprising a sacrificial layer (a) and a sacrificial layer (b) on the layer (a) on each of a top wafer and a bottom wafer each comprising interconnects in a dielectric substrate, selectively etching (120) the layer (b) on each of the top wafer and the bottom wafer to form a pattern (p2) of projections on the bottom wafer, and a pattern (p1) of projections on the top wafer, which is configured to mesh with the pattern (p2), positioning (iii) the top wafer on the bottom wafer and releasing the top wafer, such that engagement between the pattern (p1) and the pattern (p2) self-aligns the interconnects of top wafer with the interconnects of bottom wafer within a misalignment error, and selectively removing the patterns and the layer (a), and selectively removing the interconnects of top wafer are in contact with the interconnects of bottom wafer. USE - Manufacture of three-dimensional semiconductor device (claimed). ADVANTAGE - The method enables manufacture of three-dimensional semiconductor device having high density. DETAILED DESCRIPTION - An INDEPENDENT CLAIM is included for the three-dimensional semiconductor device. DESCRIPTION OF DRAWING(S) - The drawing shows a flowchart of the manufacture of three-dimensional semiconductor device. Manufacture of three-dimensional semiconductor device (100) Formation of top/bottom wafer (105) Formation of bilayer sacrificial stack (115) Selective etching of sacrificial layer (120) Formation of lubricant layer (130)