▎ 摘　　要

NOVELTY - The power transistor has a substrate (1) that is made of silicon carbide. A zone (16) for receiving a reverse voltage is formed between the source regions (9,10) and drain region (6). An insulating layer (5) is formed on the graphene layer (12). A gate electrode (4) is formed on the insulating layer. The graphene layer formed on source region is partially overlapped with the gate electrode so that ducts (13,14) are formed on graphene layer. USE - Power transistor e.g. vertical MOSFET. ADVANTAGE - Since the substrate is made of silicon carbide having high thermal conductivity, the performance of the power transistor can be improved. The line losses in the forward direction can be reduced so that reduction of power loss of power transistor can be ensured and efficiency of the power transistor can be improved. Since the graphene layers are arranged vertically, the installation space of transistor can be reduced. The power transistors can be manufactured easily at low cost. DETAILED DESCRIPTION - An INDEPENDENT CLAIM is included for method for manufacturing power transistor. DESCRIPTION OF DRAWING(S) - The drawings show the schematic views of the power transistor. Substrate (1) Gate electrode (4) Insulating layer (5) Drain region (6) Source regions (9,10) Graphene layer (12) Ducts (13,14) Zone (16)