▎ 摘　　要

NOVELTY - The device has a planar memory device which is two-dimensionally integrated with the memory unit cells having a layer (102) of non-doped semiconductor channel material. The SoC comprises a non-memory unit. The non-memory unit comprises digital, logic, analogue, digital/analogue mixed or radio frequency device. The memory unit is a NAND or NOR memory unit. The non-doped semiconductor channel material layer is selected from carbon nano-tube or two-dimensional material. The two-dimensional material is selected from molybdenum disulfide, molybdenum diselenide, boron nitride, tungsten diselenide, graphene or black phosphorus. The patterned source/drain contact layer is provided with planar memory device or array composed of a memory device unit. USE - Non-doped semiconductor device for system on chip (SoC). ADVANTAGE - The non-doped semiconductor device utilizes the characteristics that the undoped semiconductor channel material layer does not need to undergo high-temperature annealing and high-temperature ion implantation. The FET devices and memory devices are integrated on the same chip, including two-dimensional integrated or three-dimensional integrated structures, so that an integrated circuit composed of two-dimensional FET and an embedded memory integrated SoC, or two-dimensional (2D) or integration of three-dimensional (3D) SoC are formed with any combination of 2D or 3D storage. DETAILED DESCRIPTION - An INDEPENDENT CLAIM is included for a method for manufacturing the non-doped semiconductor device for SoC. DESCRIPTION OF DRAWING(S) - The drawing shows a schematic view that shows a channel layer and an insulating layer formed on a substrate having a buffer layer. Substrate (101) Non-doped semiconductor channel material layer (102) Gate insulating layer (103) Insulating layer (104)