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  • 专利标题:   Semiconductor device for NAND flash memory comprises insulating layer with trench, interconnect layer in trench having copper and concave portion in the copper, and graphene sheet on inner surface of concave portion.
  • 专利号:   US2012080796-A1, JP2012080014-A, KR2012035855-A, TW201232637-A, US8410608-B2, KR1311032-B1, JP5637795-B2, TW501299-B1
  • 发明人:   WADA M, YAMAZAKI Y
  • 专利权人:   TOSHIBA KK, TOSHIBA KK, TOSHIBA KK
  • 国际专利分类:   B82Y099/00, H01L023/48, H01L021/3205, H01L021/8247, H01L023/52, H01L027/10, H01L027/115, H01L029/788, H01L029/792, H01L021/28, H01L021/00, H01L021/30, H01L021/314, H01L021/322, H01L027/00, H01L021/336, H01L021/768, H01L023/532
  • 专利详细信息:   US2012080796-A1 05 Apr 2012 H01L-023/48 201225 Pages: 25 English
  • 申请详细信息:   US2012080796-A1 US233312 15 Sep 2011
  • 优先权号:   JP226017

▎ 摘　　要

NOVELTY - A semiconductor device comprises 1st insulating layer (13) with 1st trench, 1st interconnect layer (15) in 1st trench having copper and concave portion (16) in the copper, and graphene sheet (17) on inner surface of concave portion. USE - A semiconductor device for NAND flash memory. ADVANTAGE - Increase in interconnect resistance in concave portion is suppressed, failure due to stress migration and electromigration in concave portion is prevented, failure in embedding contact plug is reduced, preventing increase in contact resistance and discontinuity between copper damascene interconnect layer and contact plug, and high reliability is achieved. DESCRIPTION OF DRAWING(S) - The drawing shows a cross-sectional view taken along line XIV-XIV of a semiconductor device. 1st insulating layer (13) 1st interconnect layer (15) Concave portion (16) Graphene sheet (17)