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  • 专利标题:   Method for processing substrate of MOSFET during manufacturing of integrated circuit, involves providing planarized substrate, followed by selectively depositing silicon dioxide film on first material and removing graphene layer.
  • 专利号:   US2018301335-A1, KR2018115234-A, JP2018182328-A
  • 发明人:   TAPILY K N, MATSUMOTO T, KASHIWAGI Y, LEUSINK G J
  • 专利权人:   TOKYO ELECTRON LTD, TOKYO ELECTRON LTD, TOKYO ELECTRON LTD
  • 国际专利分类:   H01L021/02, H01L021/768, H01L021/316, C23C016/04, C23C016/42, H01L023/532
  • 专利详细信息:   US2018301335-A1 18 Oct 2018 H01L-021/02 201872 Pages: 11 English
  • 申请详细信息:   US2018301335-A1 US951427 12 Apr 2018
  • 优先权号:   US484815P, US951427

▎ 摘　　要

NOVELTY - A substrate processing method involves providing a planarized substrate containing a first material having a recessed feature that is filled with a second material, selectively depositing a graphene layer on the second material relative to the first material, selectively depositing a silicon dioxide film on the first material relative to the graphene layer and removing the graphene layer from the substrate. USE - Method for processing substrate of a MOSFET during manufacturing of an integrated circuit.